The invention relates to a circuit arrangement for current converters. More particularly, the invention relates to a method and circuit arrangement with adaptive overload protection for use with power switching devices, including Isolated Gate Bi-polar Transistor (IGBT) or Metal Oxide Semiconductor Field Effect Transistor (MOSFET) switches including associated free-running diodes.
Several types of circuits with overload protection for power semiconductor components are known. However, ever increasing power density demands strain the reliability and non-destructive operation of such circuits.
Conventional arrangements of power circuits using modem components experience a variety of errors. Such circuits include transistor switches using IGBT and MOSFET technology, and modem free-running diodes with soft-recovery behavior as shown in DE 4421529A1. The errors experienced, while conventional in nature, may adversely impact the drive circuit. The impact of such errors may lead to false gating, which in turn can cause the circuit to fail, or introduce other serious negative effects in the functional operation of the circuit.
Power circuits with very high component density tend to exhibit particular drawbacks when the main power and the drive circuits are in close proximity to each other. Such circuits generally have a complex configuration which is sensitive to the magnetic field generated by the main power supply. The functional safety of these circuits is particularly susceptible to errors in high-speed power switching applications such as circuit breakers which have high di/dt values. In this instance, each individual conductor can produce an effect similar to an interference pulse in the circuit operation. Elimination of interference pulses is particularly critical in a drive circuit, thus requiring special protective measures as shown in DE 19628131 A1.
Optimal circuit performance is difficult to achieve because the circuit design can compensate for only a portion of all the interference sources. Sources of interference occurring in practical operation can create fluctuations of individual parameters of circuit operation. Realistically, it is difficult to design a circuit that compensates for all of the individual parameters of circuit operation. One method of providing a general overall compensation is to introduce load capacity reserves. However, such reserves are not objectively useful for circuit functionality, and still have a negative effect on total power dissipation.
The sources and range of potential interference are very large. A small portion of possible interference sources is provided here to illustrate the complexity of the compensation required to achieve satisfactory design goals.                (1) The operational safety of the power switches themselves is determined by their dynamic parameters, fluctuation within their rated ranges and the resulting variable temperature behavior.        (2) The behavior of the free-running diodes used for commutation are an imperfect match with the power switch.        (3) The geometry of the Direct Copper Bonding (DCB) ceramics that act as a direct carrier for p-n junction active line components varies across repeated parallel connections.        (4) The structure of etched copper and the tolerances intrinsic to copper etching techniques produce surfaces of different sizes which in turn cause variable capacitance values which represent variable parasitic inductance.        
A reduced inductance design is desirable in even the smallest cell. However, design goals and practical embodiments seeking to reduce inductance generally differ to some extent. This problem is addressed, for example, as an object of the invention in DE 4105155A1.
As tests have shown, the potential for substantial reduction of parasitic inductances in the external circuitry are also considerable. Possible techniques that may be employed to reduce such inductances are the object of the invention in DE 4240501A1. In this prior art disclosure, positive and negative power connections are in close proximity, and are formed by several partial connections which must be made as symmetrical as possible to the individual switches.
Leakage inductance occurs in parallel switching arrangements. Parallel interconnection of several commutation circuits provokes an increased input-to-leakage inductance. Variable path lengths of parallel circuits consisting of divided DC circuits is another source of interference which leads to unwanted fluctuations in power switch drives. This problem is addressed by DE 19519538A1.
Cooling systems used in power switches are another potential source of negative effects on the tolerance of the overall system. DCB ceramic substrates are often cooled with a heat sink. As a practical matter, the cooling provided to the DCB ceramic substrate by a heat sink is unevenly distributed in temperature and location. Furthermore, the cooling performance itself must always be regarded as dynamic, since the magnitude of the total power to be dissipated can vary from one part of the DCB ceramic to the next. In addition, circuit operation causes heat sink gradient changes, which are further modified by external effects.
Qualitative parameters can affect the functional safety and load capacity of any circuit arrangement. Examples of such parameters include variable timing frequencies, phase shifts between active power and apparent power, the basic frequency of the circuit output and the intermediate circuit voltages, as well as other qualitative parameters. A portion of these parameters falls sufficiently outside the scope of a design with a minimized circuit reserve such that allowances must always be made for the loss of power.
Publications which show methods for the early recognition of destructive situations disclose means to protect circuit arrangements against overloads. These methods reduce the negative effect of overloads on functional capability, in addition to reducing the prescribed maximum power. The following publications address some of the specific negative effects.
In DE 4319254A1, a power semiconductor circuit arrangement is introduced that provides for the protection of overcurrents such as, for example, short-circuits. The overcurrent is detected using current sensors to protect the circuit arrangement against destruction. Once an overcurrent is detected, the circuit shuts off the power. The current sensors used include window comparators, error memories and lockout devices.
DE 4410978 describes a method and an associated circuit to improve the short-circuit tolerance of a bi-polar IGBT transistor. Zener diodes are used in this switching arrangement to limit the voltage between the MOSFET and the gate electrode of the IGBT.
There is a great amount of focus in the pertinent literature on the problem of short-circuits in rectifiers with IGBT or MOSFET switches. For example, EP0190925A1 discusses problems related to such short-circuits. According to the prior art, the maximum permissible forward voltage (Vce) of an IGBT, assuming a maximum permissible collector current, is related to the level of a gate current. This relationship dictates a limitation on the maximum possible power.
State of the art measures to increase the power density in circuit arrangements include using suitable parallel copper plates as conductor tracks, minimizing the live surfaces, minimizing the thickness of the insulation layer in case of closely adjacent plates of opposite poles, parallel-switching of parasitic inductivities and combining the homopolar tracks over short paths when the transmission line cross-section is large.
Recently, sensors for detecting and evaluating various parameters of power converter arrangements in real time have gained popularity. Current and temperature sensors have become routine components in circuit arrangements requiring high performance or reliability. The instantaneous signals from such sensors are generally compared with threshold values. When the measured signals exceed the threshold values, the entire system is shut down to prevent damage or destruction.
The threshold value limits are determined according to the state of the art in the conceptual design phase of circuit development. The limits are set as fixed values that are incorporated into the circuit as static figures. When a portion of the system changes, such as, for example, when a heat sink is replaced, new threshold values must be determined and incorporated into the circuit. Periodic changes in components with the accompanying individual changes in static values leads to the problem of exceeding overall operating range parameters. Since the components replaced are generally not isolated in their effects on the overall operation of the circuit, the permissible operating range for the circuit established at design time will inevitably be exceeded. The system will then be in a condition of operation outside of control design limits.